// SPDX-License-Identifier: MIT
/*
 * Copyright © 2020 Intel Corporation
 */

const u32 hwinfo_xehpsdv[] = {
	INTEL_HWCONFIG_MAX_SLICES_SUPPORTED, 1, 8,
	INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED, 1, 32,
	INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS, 1, 16,
	INTEL_HWCONFIG_NUM_PIXEL_PIPES, 1, 2,
	INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE, 1, 1,
	INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB, 1, 320,
	INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES, 1, 4*1024,
	INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR, 1, 2,
	INTEL_HWCONFIG_MAX_MEMORY_CHANNELS, 1, 2,
	INTEL_HWCONFIG_MEMORY_TYPE, 1, INTEL_HWCONFIG_MEMORY_TYPE_HBM2e,
	INTEL_HWCONFIG_CACHE_TYPES, 1, 1,
	INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED, 1, 65536,
	INTEL_HWCONFIG_SLM_SIZE_PER_DSS, 1, 128,
	INTEL_HWCONFIG_NUM_THREADS_PER_EU, 1, 8,
	INTEL_HWCONFIG_TOTAL_VS_THREADS, 1, 546,
	INTEL_HWCONFIG_TOTAL_GS_THREADS, 1, 336,
	INTEL_HWCONFIG_TOTAL_HS_THREADS, 1, 336,
	INTEL_HWCONFIG_TOTAL_DS_THREADS, 1, 546,
	INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS, 1, 192,
	INTEL_HWCONFIG_TOTAL_PS_THREADS, 1, 96*2,
	INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE, 1, 16,
	INTEL_HWCONFIG_MAX_RCS, 1, 1,
	INTEL_HWCONFIG_MAX_CCS, 1, 4,
	INTEL_HWCONFIG_MAX_VCS, 1, 8,
	INTEL_HWCONFIG_MAX_VECS, 1, 4,
	INTEL_HWCONFIG_MAX_COPY_CS, 1, 1,
	INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB, 1, 600,
	INTEL_HWCONFIG_MIN_VS_URB_ENTRIES, 1, 64,
	INTEL_HWCONFIG_MAX_VS_URB_ENTRIES, 1, 3832,
	INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES, 1, 64,
	INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES, 1, 1408,
	INTEL_HWCONFIG_MIN_HS_URB_ENTRIES, 1, 0,
	INTEL_HWCONFIG_MAX_HS_URB_ENTRIES, 1, 1548,
	INTEL_HWCONFIG_MIN_GS_URB_ENTRIES, 1, 2,
	INTEL_HWCONFIG_MAX_GS_URB_ENTRIES, 1, 1548,
	INTEL_HWCONFIG_MIN_DS_URB_ENTRIES, 1, 34,
	INTEL_HWCONFIG_MAX_DS_URB_ENTRIES, 1, 3576,
	INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE, 1, 32*1024,
	INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES, 1, 8*1024,
	INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES, 1, 64,
	INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, 1, 192,
	INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT, 1, 324,
	INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS, 1, 127,
	INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST, 7, 320,224,0,256,128,0,128,
	INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC, 7, 0,0,64,0,0,128,0,
	INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO, 7, 0,0,80,0,0,128,0,
	INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z, 7, 0,0,0,0,0,0,0,
	INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR, 7, 0,0,0,0,0,0,0,
	INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE, 7, 0,96,176,0,192,0,128,
	INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER, 7, 0,0,0,64,0,64,64,
	INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS, 1, 7,
	INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT, 1, 26,
};
